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Sink and Source DC/DC Controller for Termination Power Supply Applications
POWER MANAGEMENT Description
The SC1110 is a low-cost, full featured, synchronous voltage-mode controller designed to generate termination voltage in double data rate (DDR) memory systems and other applications where wide data bus need to be actively terminated. Synchronous control of the MOSFET half bridge allows power flowing bi-directionally. The termination voltage can be tightly regulated to track the chipset voltage, i.e. to be exactly 50% of that at all times. The SC1110 is ideal for low cost implementation of termination voltage supplies. SC1110 features include temperature compensated voltage reference, triangle wave oscillator and current sense comparator circuitry, and allows the use of inexpensive N-channel power MOSFETs. The SC1110 operates at a fixed 250kHz, providing an optimum compromise between efficiency, transient performance, external component size, and cost.
SC1110
Features
Generates termination voltages for active termination schemes 1% set point accuracy For 7A output current, transient regulation is better than 80mV VREFIN pin available for external 50% resistive divider to allow termination voltage track of the chip set voltage Buffered VREFOUT for system usage RDSON sensing for over current protection in hiccup mode Soft start and logic input enabling 250kHz switching for best transient and efficiency performance Gate drive capable for 0.5A sourcing and sinking
Applications
For DDR memory systems For active termination schemes in high speed logic systems
Typical Application Circuit
REFOUT
+5Vcc
+
R1 5k
C1 0.01
R2 1.24k
C2 0.1
R3 10 1
U1 SC1110 VCC REFOUT 14
R4 1k
C4 0.022
C7 1.0
C8,9 2 x 10uF
C10,11 2 x 560uF
Vin 2.5V
_
SS/ENBL 2 C3 0.1 PWRGD 4 C25 0.1 PWRGD COMP 11 SS/ENBL REFIN 13 R5 1k 3 OCSET SENSE 12 R6 4.7k C5 0.047
5
GND
BSTL
10 D1 MBRM120 R7 2.2 R8 2.2 Q1 Si9426DY Q2 Si9426DY C6 1.0
6
PHASE
BSTH
9
7
DL
DH
8
L1 800 nH
+
C12-14 3 x 560uF C15-24 10 x 10uF
Vout = 1.25V @ 7A
_
C10-14: Sanyo, 4SP560M C8,9,15-24: TDK, CC3216AX5R0J106K L1: Panasonic, ETQP6F0R8L or Falco, QPIP1205-809-3 Q1,Q2 options: Si9426DY, FDS6890A, IRF7401 D1: ON Semi (Motorola)
Revision: July 20, 2004
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SC1110
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter VCC, BSTL to GND PGND to GND PHASE to GND BSTH to PHASE Thermal Impedance Junction to Case Thermal Resistance Junction to Ambient Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. ESD Rating (Human Body Model)
Symbol VIN
Maximum -0.5 to 14 +0.5 -0.3 to 18 14
Units V V V V C/W C/W C C C kV
JC J A TA TSTG TLEAD V ESD
45 115 0 to 70 -65 to +150 300 2
Electrical Characteristics
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter Pow er Supply Supply Voltage Supply Current Line Regulation Under Voltage Lockout Turn-On Threshold Turn-Off Threshold Error Amplifier Transconductance Open Loop DC Gain Bandwidth - 3dB COMP Source Capability Input Bias Oscillator Oscillator Frequency Oscillator Max Duty Cycle Ramp Height
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Conditions
Min
Typ
Max
Units
VCC
4.4 8
12.6 12
V mA %
VO = 2.5V 0.5V, VO = VIN/2 @ 0A
0.5
4.15 3.95
V V
2 50 (Unity gain crossover 70MHz) 500 250 2 5
mS dB kHz A A
225 90
250 95 1
275
kHz % V
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SC1110
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter Timing Minimum Off-Time Dead Time MOSFET Drivers Peak DH Sink/Source Current
Conditions
Min
Typ
Max
Units
200 Guaranteed by characterization 80
ns ns
BSTH - DH = 4.5V, DH - PHASE = 3.0V DH - PHASE = 1.5V
0.5 0.1
A
Peak DL Sink/Source Current
BSTL - DL = 4.5V, DL - GND = 3.0V DL - GND = 1.5V
0.5 0.1
A
Protection Overcurrent Set Isource Soft Start Charge Current Discharge Current Pow er Good Upper Threshold Lower Threshold PWRGD Voltage Low Reference REFOUT Source Current Offset Enable Threshold 0.55 0.60 0.65 V REFIN = 1.25V -5 3 5 mA mV IPWRGD = 2mA 112 88 0.5 % % V VSS = 1.5V VSS = 1.5V 8 1 10 2 12 3 A A VOCSET = 2.2V 180 200 220 A
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SC1110
POWER MANAGEMENT Timing Diagrams
SIMULATION WAVEFORMS SIMULATION W AVEF ORMS 2.5V and 1.25V ramp up
Output current of the VTT supply
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SC1110
POWER MANAGEMENT Pin Configuration Ordering Information
Device
(1)
Package(1)(2) SO-14 TSSOP-14
Temp Range (TJ) 0 to 125C
SC1110CSTRT SC1110TSTRT
Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product.
(14 Pin SOIC or TSSOP)
Pin Descriptions
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name VC C SS/ENBL OCSET PWRGD GND PHASE DL DH BSTH BSTL COMP SENSE REFIN REFOUT Pin Function Chip Supply Voltage. Soft start/Enable. Current limit set point. Logic high indicates correct output. Ground. Phase node connection between MOSFETs. Low side driver output. High side driver output. High side driver supply. Low side driver supply. Error amplifier output, compensation. Error amplifier negative input. Error amplifier positive input. Buffered reference voltage.
NOTE: (1) All logic level inputs and outputs are open collector TTL compatible.
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SC1110
POWER MANAGEMENT Block Diagram
Applications Information
THEORY OF OPERATION Synchronous Buck Converter VTERMINATION power is provided by a synchronous, voltagemode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency synchronous buck converter for termination of power application. The output voltage of the synchronous converter is set and controlled by the output of the error amplifier. The external resistive divider generates reference voltage for the error amplifier from the chipset voltage which is usually 2.5V. The inverting input of the error amplifier receives its voltage from the SENSE pin. The internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the oscillation frequency to 250kHz. The triangular output of the oscillator sets the reference voltage at the inverting input of the PWM comparator. The non-inverting input of the comparator receives it's input voltage from the error ampli 2004 Semtech Corp. 6
fier. When the oscillator output voltage drops below the error amplifier output voltage, the comparator output goes high. This pulls DL low, turning off the low-side FET, and DH is pulled high, turning on the high-side FET (once the cross-current control allows it). When the oscillator voltage rises back above the error amplifier output voltage, the comparator output goes low. This pulls DH low, turning off the high-side FET, and DL is pulled high, turning on the low-side FET (once the cross-current control allows it). As SENSE increases, the output voltage of the error amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH, hence lowering the output voltage. Under Voltage Lockout The under voltage lockout circuit of the SC1110 assures that both the high-side MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if VCC falls below 4.1V. Normal operation resumes once VCC rises above 4.2V.
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SC1110
POWER MANAGEMENT Applications Information
Soft Start Initially, SS/ENABLE sources 10A of current to charge an external capacitor. The outputs of the error amplifiers are clamped to a voltage proportional to the voltage on SS/ENABLE. This limits the on-time of the high-side MOSFETs, thus leading to a controlled ramp-up of the output voltages. RDS(ON) Current Limiting The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage drop across this resistor is due to the 200A internal sink sets the voltage at the pin. This voltage is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to avoid false current limit triggering due to uncontributing measurements from the MOSFET's off-voltage. When the voltage at PHASE is less than the voltage at OCSET, an overcurrent condition occurs and the soft start cycle is initiated. The synchronous switcher turns off and SS/ENABLE starts to sink 2A. When SS/ENABLE reaches 0.8V, it then starts to source 10A and a new cycle begins. Hiccup Mode During power up, the SS/ENABLE pin is internally pulled low until VCC reaches the undervoltage lockout level of 4.2V. Once VCC has reached 4.2V, the SS/ENABLE pin is released and begins to source 10A of current to the external soft-start capacitor. As the soft-start voltage rises, the output of the internal error amplifier is clamped to this voltage. When the error signal reaches the level of the internal triangular oscillator, which swings from 1V to 2V at a fixed frequency of 250 kHz, switching occurs. As the error signal crosses over the oscillator signal, the duty cycle of the PWM signal continues to increase until the output comes into regulation. If an over-current condition has not occurred the soft-start voltage will continue to rise and level off at about 2.2V.
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SC1110
POWER MANAGEMENT Typical Characteristics
CH1: Vout_ripple CH2: Phase node Vin = 2.5V Vout = 1.25V Iout = 7A
95% 90% Efficiency 85% 80% 75% 70% 65% 60% 0 1 2 3 4 5 6 7 8 9 10 11 12 Current, A 1.0% 0.5% Regulation 0.0% -0.5% -1.0% 0 1 2 3 4 5 6 Current, A 2004 Semtech Corp. 8 www.semtech.com 7 8 9 10 11 12
SC1110
POWER MANAGEMENT Evaluation Board
Top View
Bottom View
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SC1110
POWER MANAGEMENT Evaluation Board (Cont.)
Top Copper Bottom Copper
Midlayer 1
Midlayer 2
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SC1110
POWER MANAGEMENT Outline Drawing - SO-14
Land Pattern - SO-14
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SC1110
POWER MANAGEMENT Outline Drawing - TSSOP-14
Land Pattern - TSSOP-14
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
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